Technical Field
This disclosure generally relates to computing. More specifically, this disclosure relates to methods and apparatuses for determining a subset of tests or ranking tests, wherein each test provides test coverage for a set of objects.
Related Art
The importance of testing circuit designs cannot be over-emphasized. Indeed, without proper testing it would have been impossible to design complicated integrated circuits which are commonly found in today's computing devices.
A circuit design can be tested by using a directed-test based simulation or by using a constrained random simulation. In a directed-test based simulation, the design is subjected to specific stimuli that are designed to test a particular aspect of the design. In a constrained random simulation, random vectors are generated to satisfy certain operating constraints of the design. These constraints are usually specified as part of a test-bench program. A test-bench automation tool (TBA) uses the test-bench program to generate random solutions for a set of random variables, such that a set of constraints over the set of random variables is satisfied. These random solutions can then be used to generate valid random stimuli for the Design Under Verification (DUV).
Regardless of whether the stimuli is generated for a directed-test simulation or for a constrained random simulation, the results of the simulation can then be examined to determine functional coverage, which provides a measure of confidence on the verification quality and completeness.
A DUV may be subjected to tens of thousands of tests, and each test may have different coverage, run times, memory requirements, etc. It is desirable to reduce the amount of time required to thoroughly test circuit designs.